SimulIDE trunk Tester builds.

These are last builds of trunk branch at Revision:

- Rev 1677:
Download SimulIDE-R1677_Win64
Download SimulIDE-R1677_Win32
Download SimulIDE-R1677_Lin64


Changes since Rev 1657:

Bug Fixes:
- Voltage Regulator: Error if not connected.
- PICs: CCP Compare Error.
- Oscope: Wrong voltage label position in Auto mode.
- Atmega8: Usart error writting to UCSRC.
- PIC OcUnit: CCPM case 2 toggle works in non enhanced.
- Uno/Redo: error restoring Connectors.
- MCU Interrupts: Error returning from nested interrupt.
- MCUs: crash due to McuIntOsc not deleted.
- Debugger: crash if Mcu deleted and file closed while debugging.
- SSD1306: Error in 128x32 mode.

- Subcircuit: Always hide property value.
- LogicComponent: m_outEnable not initialized.
- Text Component: Limit 0 > opacity < 1.
- Undo/Redo: Crash due to index error.

Changes:
- Restore Circuit Error warning.
- PICs: ConfigWord for 12F683, 629, 675; 16F630,676,684,685,687,689,690.

- Limit reactive autostep to 2.
- Added Dynamic RAM (vranik).

Reuploaded files for Windows at Rev 1055.

Schemes containing logical symbols open with an error. There is no "logical symbol" option in the properties of subcircuits.

Are the MEXLE2020 components not functioning? I think these are still empty objects without microcontrollers and other functional components.

Schemes containing logical symbols open with an error. There is no "logical symbol" option in the properties of subcircuits.

Thanks I will have a look.

Are the MEXLE2020 components not functioning? I think these are still empty objects without microcontrollers and other functional components.

Those components are just files to test boards, they should not be there.
I reuploaded the files and forgot to remove them.

The scheme from the post ( https://simulide.forumotion.com/t390p75-simulide-1-0-0-tester-builds#2566 ) does not work.
The microcontroller contains errors.
1. There is no indication on the display.
2. When the PLAY mode is selected, the lower engine does not work.


The MCU monitor does not display the lower bits of the status register. This applies to all microcontrollers.



Many models are missing, such as digital potentiometers.

Schemes containing logical symbols open with an error. There is no "logical symbol" option in the properties of subcircuits.

The scheme from the post ( https://simulide.forumotion.com/t390p75-simulide-1-0-0-tester-builds#2566 ) does not work.

Solved At Rev 1057.

2. When the PLAY mode is selected, the lower engine does not work.

Not solved yet.

Properties unit multipliers are broken.

Solved at Rev 1065.

New build at Rev 1073 uploaded.

Have a look at first post for download links and list of changes.

ROM contains errors:
1) in storage mode, the outputs of the data bus are in the active state. In SimulIDE 0.4.15, in this mode of operation, the data bus is in the third state.
2) when opening a circuit file containing a ROM, the logical symbol of the ROM is distorted.

The C flag of the SREG register is not displayed in the MCU monitor

2) when opening a circuit file containing a ROM, the logical symbol of the ROM is distorted.

Solved at Rev 1074.

1) in storage mode, the outputs of the data bus are in the active state. In SimulIDE 0.4.15, in this mode of operation, the data bus is in the third state.

There is a problem with this component:
This should be a generic memory, but different commercial memories have different ways to read/write data:
Some are level triggered, some are edge triggered with different combinations to latch address and data.

I can't find a simple way to make this component configurable in a way that all combinations can be achieved.

Te only solution I can see it making it level triggered and implement edge latching in external circuitry.

Any ideas?

The C flag of the SREG register is not displayed in the MCU monitor

Hopefully solved at Rev 1076.

I can't find a simple way to make this component configurable in a way that all combinations can be achieved.

Te only solution I can see it making it level triggered and implement edge latching in external circuitry.

Any ideas?

I think that it is necessary to ensure the compatibility of the ROM/RAM component with the mode of operation as in version 0.4.15. Users of the program still have schemes using RAM/ROM, and in the new version they no longer work. For example, my schemes Nibbler, ROM editor do not work in the new version of the program. Therefore, you have to open them in the old version of the program.
The solution may be as follows:
1) leave the new model (call it synchronous memory) and add a model that is compatible with the old version of the program (call it asynchronous memory or compatible with the version of the program 0.4.15).
2) add compatibility mode with version 0.4.15 to the properties of the new model.

I would like to see the opinions of other users on this issue.

1) leave the new model (call it synchronous memory) and add a model that is compatible with the old version of the program (call it asynchronous memory or compatible with the version of the program 0.4.15).
2) add compatibility mode with version 0.4.15 to the properties of the new model.

We could add a property "Synchronous" or something like that.

2) add compatibility mode with version 0.4.15 to the properties of the new model.

Added "Asynchronous" property at Rev 1082.

By default it should work as previous versions.

The scheme from the post ( https://simulide.forumotion.com/t390p75-simulide-1-0-0-tester-builds#2566 ) does not work.
...
2. When the PLAY mode is selected, the lower engine does not work.

This should be solved at Rev 1085.

Detected errors (Rev 1073):
Pattern Generator, Pulse generator (1-15 pulses), AUTO Pulse generator (1-15 pulses), A button with a rattle of contacts, all digital potentiometers  you cannot add a diagram to the workspace of the program.
When opening a schema file containing the listed components, they do not appear on the schema.



In the "5 Bit Counter" tool, it is difficult to switch the DIP switch marked "H". You need to get the mouse to the lower left corner of the button, which often causes difficulties (uncritical error).

Pattern Generator, Pulse generator (1-15 pulses), AUTO Pulse generator (1-15 pulses), A button with a rattle of contacts, all digital potentiometers you cannot add a diagram to the workspace of the program.
When opening a schema file containing the listed components, they do not appear on the schema.

Solved at Rev 1088.

In the "5 Bit Counter" tool, it is difficult to switch the DIP switch marked "H". You need to get the mouse to the lower left corner of the button, which often causes difficulties (uncritical error).

Solved at Rev 1089.

Incorrect operation of the PINB, PINC, PIND command on Arduino. The proposed sketch works differently in the programs version 0.4.15 and 1.0.0.
The sketch demonstrates the glow of the LED when you press the matrix keyboard button. Each button has its own LED.
In SimulIDE R1073, after starting the sketch, the indication corresponds to pressing all the keys simultaneously. After consecutive pressing of the buttons from one column, the correct operation of the sketch is restored.  After restarting the simulation, the error repeats. When debugging, the contents of the PIND register in the MCU monitor do not correspond to the state of the port inputs.

Incorrect operation of the PINB, PINC, PIND command on Arduino.

Thanks. I think this problem was already solved at Rev 1094.

I will upload new executables later.

New build at Rev 1101 uploaded.

Have a look at first post for download links and list of changes.

The ROM/RAM model is not compatible in asynchronous mode with the similar SimulIDE 0.4.15 model. The mode of recording and storing information differs. The schemes developed in the program Simulate 0.4.15 working with write-able RAM do not work in the new version. To test the model, we had to develop a new scheme.

Detected problems:

during recording, the RAM data bus has a very low impedance (high-level voltage is significantly less than 5 Volts) (screenshot 2)
after recording a number in memory, there is a low voltage level at the output (screenshot 3)

Test schemes and screenshots by link (I can't upload files here):

https://disk.yandex.ru/d/A5TP65Mx9kg4Dw

Recommendations: in asynchronous mode, it is necessary to maintain full compatibility with the RAM/ROM model in the SimulIDE 0.4.15 program. Asynchronous mode should be set by default. This will allow not to modify the old schemes in which ROM/RAM is used, including some subcircuits.

The ROM/RAM model is not compatible in asynchronous mode with the similar SimulIDE 0.4.15 model.

In 0.4.15 Memory works as what I understand by synchronous:
Data is loaded at the falling edge of clock.
In this case clock low = !WE & !CS.

By asynchronous I understand:
Data is loaded while CS and WE are low.
If the data or address lines change during this period, those changes are inmediately saved to memory.

So I understand synchronous as synchronous with clock, equivalent to Trigger type = clock in other components.
That is why it is synchronous by default: compatible with older versions.

during recording, the RAM data bus has a very low impedance (high-level voltage is significantly less than 5 Volts) (screenshot 2)

I can't reproduce this problem:

after recording a number in memory, there is a low voltage level at the output (screenshot 3)

This problem I can reproduce.
I think it's solved at Rev 1114.

The previous problem is probably related with this but only happens after certain sequence.

The program has several subcircuits based on ROM, for example: 74xx184, 74xx185, Pattern Generator, 5 Bit Counter (in them ROM is used in read mode). I posted a Nibbler project in which ROM/RAM is used in read and write modes. In the new version, these subcircuits did not work. After selecting the "Asynchronous" property in the ROM, the subcircuits worked correctly. Nibbler does not work with any settings of this property. Therefore, it is important that the ROM component has this property set by default.
I did some experiments on remaking ROM-based subcircuits and got excellent results. In the near future, I plan to redo all the subcircuits that are possible. I really want to be in time for the release of the next version of the program. To do this, it is necessary that the operating modes of ROM / RAM are standardized and not changed in the future.

Old version of the subcircuit:


A ROM-based subcircuit:


The increase in simulation speed depends on the complexity of the subcircuit. More complex circuits have a greater speed gain.