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Test of package pic16f1826 failed with following source code

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Olaf



I create Hex-file on Debian and Windows 10 with code blocks.
After then i loaded Hex-file by Firmware menu on Pic16f1826 on simulide. There's no signal on RB0 and RA2.
Can someone help me?

Test of package pic16f1826 failed with following source code:



/*
*  Microcontroller: 16F1827 @ 32MHz
*  Board: Breadboard
*  File:  dac.c
*  Lernsituation: Alarmanlage
*  Sinussignale @ 649Hz und 476Hz
*/

#include
#include

//Sinussignale

char sin649[22]={16,20,24,28,30,31,31,30,28,24,20,16,12,8,4,2,1,1,2,4,8,12}; //649Hz

char sin476[30]={16,19,22,25,27,29,30,31,31,30,29,27,25,22,19,16,13,10,7,5,3,2,1,1,2,3,5,7,10,13}; //476Hz


// CONFIG REGISTER 1 settings
__code unsigned short int __at (_CONFIG1) __configword1 =//(_CONFIG1) (0x8007)
_FOSC_INTOSC  & // Oscillator Selection INTOSC oscillator: I/O function on CLKIN pin
_WDTE_OFF     & // Watchdog Timer disabled
_PWRTE_OFF    & // Power-up Timer disabled
_MCLRE_ON     & // MCLR Reset enabled
_CP_OFF       & // Flash Program Memory Code Protection Program memory code protection is disabled
_BOREN_OFF    &   // Brown-out reset disabled
_IESO_OFF     & // Internal-External switchover mode is disabled
_CLKOUTEN_OFF; // CLKOUT function is disabled

// CONFIG REGISTER 2 settings
__code unsigned short int __at (_CONFIG2) __configword2 =//(_CONFIG2) (0x8008)
_PLLEN_ON    & // 4xPLL-enable ON
_STVREN_ON   & // Stack Overflow/Underflow Reset Enable
_BORV_LO     &         // Brown out reset voltage low trip point selected
_DEBUG_OFF   &         // Background debugger disabled
_LVP_ON; // Low voltage programming enabled

//Input
//#define TASTER_1 RA2 // Macro definition

//Output
#define PROBE  RB0

//Constants
#define ON  1
#define OFF 0
#define PRESSED   1
#define UNPRESSED 0

//Global variables
char counter=0;

static void irqHandler(void) __interrupt 0
{
if(T0IF)
{
PROBE = 1;
DACCON1=sin649[counter++];  // 649Hz
//DACCON1=sin476[counter++];  // 476Hz
TMR0 = 118; // Berechnet: TMR0 = 116;
T0IF=0;
//Für 649Hz
if(counter==22)
counter=0;
//Für 476Hz
//if(counter==30)
// counter=0;
PROBE = 0;
}
}

void main(void)
{
int i=0;
// OSCCON-Reg. on page 65 (datasheet PIC16F127)
// OSCCON-Reg. on page 65 (datasheet PIC16F127)
   OSCCON=0b01110000; // Bit 7:  0 SPLLEN is ignored
                                                                       // Bit6-3: 1110 16F1827 (8MHz + PLL ON) = 32MHz
                                                                       // Bit2:   Unimplemented
                                                                       // Bit1=0,Bit0=0:Clock implemented by FOSC<2:0> in config. word 1

   FVRCON=0b10001000;


                                                                       // Bit1-0: 00 Internal oscillator (word 1)

DACCON0=0b11101000; // DACCON-Reg. on page 156 (datasheet PIC 16F1827)
// Bit 7:  1 = DAC is enabled
// BIT 6:  1 = DAC positive reference source selected
// Bit 5:  1 = DAC voltage level is also an output  on the DACOUT pin
// Bit 4:  Unimplemented
// Bit 3-2:10=FVRBUFFER2
// Bit 1:  Unimplemented
// Bit 0:  0=VSS

// TRIS-Reg. on page 122 (datasheet PIC16F1827)
TRISA=0b11111011; // RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
                                                                       //  1   1   1   1   1   0   1   1
// 0=Output
                                                                       // 1=Input
                                                                       // RA2=DACOUT+

// TRIS-Reg. on page 122 (datasheet PIC16F1827)
TRISB=0b11111110; // RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
                                                                       //  1   1   1   1   1   1   1   1
// 0=Output
                                                                       // 1=Input
                                                                       // RB0=Probe

// OPTION Reg. on page 176 (datasheet PIC16F1827)
OPTION_REG=0b11000001;                                           // BIT2=0,BIT1=0,BIT0=1 Prescaler at 1:4
// BIT3=0 PSA=0 Prescaler is assigned to the Timer0 module
// BIT4=0 Increment on low-to-high transition
// BIT5=0 TMR0 CLock select bit: Internal instruction cycle clock (FOSC/4)
// BIT6=1 Interrupt on rising edge of INT pin
// BIT7=0 Weak pull ups are enabled by WPUx-Register vaule

// ANSELA-Reg. (ADC) on page 123 (datasheet PIC16F1827)
ANSELA=0b00000000; // 7 6 5   4    3    2     1     0     BIT
                                                                       // - - -  RA4  RA3   RA2   RA1   RA0
                                                                       // 1 = Analog
                                                                       // 0 = Digital

// ANSELB-Reg. on page 128 (datasheet PIC16F1827)
ANSELB=0b00000000; //  7   6   5   4   3   2   1   0     BIT
                                                                       // RB7 RB6 RB5 RB4 RB3 RB2 RB1  /
                                                                       // 1 = Analog
                                                                       // 0 = Digital

WPUA=0b00000000; // Weak pull up resistors PORTA disabled
WPUB=0b00000000; // Weak pull up resistors PORTB disabled


GIE=1;
TMR0IE=1;

PROBE = 0;
DACCON1=0;

while(1)
{
//Tut irgend etwas
for(i=0;i <2048; i++);
}
}

arcachofo

arcachofo

Hi.

DAC module is not implemented yet, this is why your code does nothing.

Olaf



I there some change the DAC Module will be implemented soon.

I've very grateful, if you can inform me about forder Implementation of DAC Module

Olaf



How could i see how modules are yet implemented ?
Is there some chance that the DAC Module will implemented soon?

arcachofo

arcachofo

How could i see how modules are yet implemented ?
For 16F1826 you can have a look to this file:
data/PIC/p16F182x/p16F182x_perif.xml

And this forum discussion:
https://simulide.forumotion.com/t405-pic-enhanced-mid-range-core-and-16f1826

Is there some chance that the DAC Module will implemented soon?
Yes, there is some chance.
But depends on what you understand by "soon".
I will have a look.

arcachofo

arcachofo

Hi, I'm working in the DAC module.
Can you share your hex file to check if it's working?

7Test of package pic16f1826 failed with following source code Empty Here is the hex-file you ask me before Sat Oct 14, 2023 9:17 am

Olaf



this is create on debian-OS on an raspian pc
Attachments
Test of package pic16f1826 failed with following source code AttachmentDAC.zip
this is create on debian-OS on an raspian pc
You don't have permission to download attachments.
(1 Kb) Downloaded 1 times



Last edited by Olaf on Sat Oct 14, 2023 9:23 am; edited 1 time in total (Reason for editing : I could not see the attached file)

Olaf



compiled on codeblocks
Attachments
Test of package pic16f1826 failed with following source code AttachmentDAC3.zip
compiled on codeblocks
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(1 Kb) Downloaded 1 times

9Test of package pic16f1826 failed with following source code Empty Here is the c-file to the Dac Project Sat Oct 14, 2023 9:31 am

Olaf



Here is the c-file to the Dac Project
Attachments
Test of package pic16f1826 failed with following source code Attachmentdac (2).zip
Here is the c-file to the Dac Project
You don't have permission to download attachments.
(2 Kb) Downloaded 1 times

arcachofo

arcachofo

Great, thank you very much.

arcachofo

arcachofo

I'm getting a sine wave with amplitude around 384 uV.
Is that correct?

Olaf



That's right!

Olaf



Sorry, i think the max voltage must be around
3.384 V

Olaf



3.84V

arcachofo

arcachofo

Sorry, i think the max voltage must be around
3.384 V
Ok I found a silly error, but now I'm getting 2.4 V.

arcachofo

arcachofo

Found another error in FVR module (2.48 instead of 2.048).
Now I get 1.984 V.

I had a look at the code and if I understand correctly the max output should be 2.048 V:
DAC is using FVR Buffer2 output.
FVRCON=0b10001000;
10 = Comparator and DAC Fixed Voltage Reference Peripheral output is 2x (2.048V)

So I think it is correct now.

Test of package pic16f1826 failed with following source code Dac10

17Test of package pic16f1826 failed with following source code Empty Yes this Is correct! Grate! Sat Oct 14, 2023 8:34 pm

Olaf



Yes this is correct!
That's grate!
This code was created for my electronic students, and i use different circuits to create a soundwave approximatly 649 Hz.

arcachofo

arcachofo

Nice.
This device still need some work, there are some modules not implemented or incomplete.
I usually work in what users show interest and specially are willing to test and report, otherwise I work in something else.

You can test the new DAC (and FVR module) in the last tester builds:
https://simulide.forumotion.com/t550-simulide-trunk-tester-builds#2961



Last edited by arcachofo on Mon Oct 16, 2023 4:53 pm; edited 1 time in total (Reason for editing : Typo)

19Test of package pic16f1826 failed with following source code Empty Thank you very much Mon Oct 16, 2023 4:52 pm

Olaf



Thank you very much

Olaf



Hello Arcachofo,
It sems that the frequency is around 4 times bigger that the target frequency. Could you help me please to correct this error? If i comper the probe Signal on a real oszilliskop the periode Is about 73us.
Best regards
Olaf

arcachofo

arcachofo

Hi Olaf.

I'm working on it, it is almost solved but still some detail to fix.
Problem was about PLL not implemented and an error setting the config words.
You can see it at the bottom panel:
Loading hex file:
/home/user/Downloads/DAC/DAC3.hex

   Extended Linear Address: 0x0
   Extended Linear Address: 0x10000
   Warning: PGM End reached at Line 45
   Address: 0x8007 > PMG End: 0x7FF
   TODO: Config word ??

Firmware succesfully loaded

Now looks like this:
Loading hex file:
/home/user/Downloads/DAC/DAC3.hex

   Extended Linear Address: 0x0
   Extended Linear Address: 0x10000
   Loaded Config Word at: 0x8007  value = 0x29E4
     INTOSCIO: I/O OSC1            
     Watchdog: Disabled
     MCLR:     Enabled

   Loaded Config Word at: 0x8008  value = 0x3FFF
     PLL:      Enabled

Firmware successfully loaded

Olaf



Hello and good evening Arcachofo,
At school useualy we works on a selfimplemented sistem including a Raspberry 4 pc that compiled the pic16f1826. We use on the Raspian PC the Last bulleye OS. Sometimes we found enought time to implement circuits on the breathboard. Now our Intention is tò use Simulide on Windows but It can be helpfull use Simulide on the bulleye OS on Raspian 4. Is there a simple way tò use Simulide on Raspian 4 with bulleye OS?
Have a very good night
Best regards
Olaf

arcachofo

arcachofo

Is there a simple way tò use Simulide on Raspian 4 with bulleye OS?
Probably you can compile SimulIDE in  bulleye OS.
But I guess simulation would be quite slow.

24Test of package pic16f1826 failed with following source code Empty PLLen errors Mon Oct 23, 2023 10:22 pm

Olaf



Is there a new test Version of Simulide for Pic package wer PLLen errors are fixed?
arcachofo wrote:Hi Olaf.

I'm working on it, it is almost solved but still some detail to fix.
Problem was about PLL not implemented and an error setting the config words.
You can see it at the bottom panel:
Loading hex file:
/home/user/Downloads/DAC/DAC3.hex

   Extended Linear Address: 0x0
   Extended Linear Address: 0x10000
   Warning: PGM End reached at Line 45
   Address: 0x8007 > PMG End: 0x7FF
   TODO: Config word ??

Firmware succesfully loaded

Now looks like this:
Loading hex file:
/home/user/Downloads/DAC/DAC3.hex

   Extended Linear Address: 0x0
   Extended Linear Address: 0x10000
   Loaded Config Word at: 0x8007  value = 0x29E4
     INTOSCIO: I/O OSC1            
     Watchdog: Disabled
     MCLR:     Enabled

   Loaded Config Word at: 0x8008  value = 0x3FFF
     PLL:      Enabled

Firmware successfully loaded

arcachofo

arcachofo

Is there a new test Version of Simulide for Pic package wer PLLen errors are fixed?
I will upload it soon.

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