R1837 patch clock cycle for 8051 instructions should be multiple of 2.

In 8051, one machine cyle = 2 read cycle.

So read cyles for instructions should be multiple of 2.

But instructions like 'setb' is 3 now . (should be 4)

The patch tries to fix it. (Check if m_cycle+1 is multiple of 2 before exec())

Also fixes:
 Read 16bit address high / low 8bit shouldn't be different by m_cycle. (This only works when it's the first read operation)

Not sure about this...

SETB instruction should take 1 machine cycle (2 read cycles)?

arcachofo wrote:Not sure about this...

SETB instruction should take 1 machine cycle (2 read cycles)?

Yes, all instructions that read ops has an extra cycle.

I've found the reason:

m_cpuState is not set to CPU_EXEC immediately after the last read op finished. so an extra read cycle is added.



Patch updated

m_cpuState is not set to CPU_EXEC immediately after the last read op finished. so an extra read cycle is added.

Yes exactly.
Patch applied at Rev 1839.