Sample 2 is finished.
There were some typos in the samples and a wiring mistake in the comparator section.
The typos are marked in red
Numonic Address Data Instruction Comments------------------------------------------------------------------------------Sample 1 Make leds count Runs in segment zero.LIT 1 0000 0000 0000 0001 Put 0 in the accumulator.REG 0000 0001 0000 0110 Select register A.LOAD 0000 0010 0000 0010 Load value into accumulator from reg A.OUT 0000 0011 0000 1110 Send accumulator value to output.INC 0000 0100 0000 0100 Increment accumulator.STORE 0000 0101 0000 0011 Store accumulator back to register A.RST 0000 0110 0000 1001 Restart program counter.Numonic Address Data Instruction Comments ------------------------------------------------------------------------------Sample 2 Make leds go 1-2-4-8 Runs in 4 memory segments. Segment 0. Loads registers A and B.LIT 0 0000 0000 0000 0001 Put 0 in the accumulator.REG 0000 0001 0000 0110 Select register A for write.LIT 1 0000 0010 0001 0001 Put 1 in the accumulator.STORE 0000 0011 0000 0011 Put 1 in register A.LIT 1 0000 0100 0001 0001 Put 1 again in the accumulator.REG 0000 0101 0000 0110 Select register B for write.LIT 2 0000 0110 0010 0001 Put 2 in the accumulator.STORE 0000 0111 0000 0011 Put 2 in register B.CMPL 0000 1000 0010 0111 Compare to last accu value.Set equal flgLIT 1 0000 1001 0001 0001 Put 1 in the accumulator.JUMPE 0000 1010 0000 1011 Jump to segment 1.Segment 1. Loads registers C and D.LIT 2 0001 0000 0010 0001 Put 2 in the accumulator. REG 0001 0001 0000 0110 Select register C for write. LIT 4 0001 0010 0100 0001 Put 4 in the accumulator. STORE 0001 0011 0000 0011 Put 4 in register C. LIT 3 0001 0100 0011 0001 Put 3 in the accumulator. REG 0001 0101 0000 0110 Select register D for write. LIT 8 0001 0110 1000 0001 Put 8 in the accumulator. STORE 0001 0111 0000 0011 Put 8 in register D. CMPL 0001 1000 1000 0111 Compare to last accu value.Set equal flg LIT 2 0001 1001 0010 0001 Put 2 in the accumulator. JUMPE 0001 1010 0000 1011 Jump to segment 2.Segment 2. Sends regs A and B to output.LIT 0 0010 0000 0000 0001 Put 0 in the accumulator.REG 0010 0001 0000 0110 Select register A for read.LOAD 0010 0010 0000 0010 Load register A to accumulator.OUT 0010 0011 0000 1110 Output accumulator (register A).LIT 4 0010 0100 0100 0001 Put 4 in the accumulator.REG 0010 0101 0000 0110 Select register B for read.LOAD 0010 0110 0000 0010 Load register B to accumulator.OUT 0010 0111 0000 1110 Output accumulator (register B).CMPR 0010 1000 0000 1000 Compare accu to register.Set equal flag.LIT 3 0010 1001 0011 0001 Put 3 in the accumulator.JUMPE 0010 1010 0000 1011 Jump to segment 3.Segment 3. Sends registers C and D to output.LIT 8 0011 0000 1000 0001 Put 8 in the accumulator.REG 0011 0001 0000 0110 Select register C for read.LOAD 0011 0010 0000 0010 Load register C to accumulator.OUT 0011 0011 0000 1110 Output accumulator (register C).LIT 12 0011 0100 1100 0001 Put 12 in the accumulator.REG 0011 0101 0000 0110 Select register D for read.LOAD 0011 0110 0000 0010 Load register D to accumulator.OUT 0011 0111 0000 1110 Output accumulator (register D).CMPR 0011 1000 0000 1000 Compare accu to register.Set equal flag.LIT 2 0011 1001 0010 0001 Put 2 in the accumulator.JUMPE 0011 1010 0000 1011 Jump back to segment 2 - loop.Numbers in red are (corrected) typos at the Gep-websitehttp://www.galacticelectronics.com/4BitCPU_SamplePrograms.HTML
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The wiring mistake is this one:
Comparator 74HC85 inputs A0-3 should be connected with D0-3.
After these bugs were solved it's running very nice. And by coïncidence Sample2 can be used to drive a stepper motor.
Data decimals for Ram0:
0, 0, 1, 0, 1, 0, 2, 0, 2, 1, 0, 0, 0, 0, 0, 0
2, 0, 4, 0, 3, 0, 8, 0, 8, 2, 0, 0, 0, 0, 0, 0
0, 0, 0, 0, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0
8, 0, 0, 0, 12, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0
Data decimals for Ram1:
1, 6, 1, 3, 1, 6, 1, 3, 7, 1, 11, 0, 0, 0, 0, 0
1, 6, 1, 3, 1, 6, 1, 3, 7, 1, 11, 0, 0, 0, 0, 0
1, 6, 2, 14, 1, 6, 2, 14, 8, 1, 11, 0, 0, 0, 0, 0
1, 6, 2, 14, 1, 6, 2, 14, 8, 1, 11, 0, 0, 0, 0, 0
Simu-file:
https://github.com/Alectus/Gep-Cpu/blob/main/Gep%20Cpu%20Part3%20JQ%20Sample2%20completed.simuClock is set at 1 kHz.