When TWI and Timer0 are used from AVR core, it seems that the core "resets" continuously, once a signal gets received.
I have two outputs included: ok signal in main-loop (PORTB0) and (re)start signal ahead of the main loop (PORTB1).
The (re)start signal should there be only once, but appears continuously after receiving a signal
OK Situation
![I2C + TIMER0_OVF_vect can create continuous resets (R977 @ WIN10) Withou10](https://i.servimg.com/u/f57/20/25/17/30/withou10.jpg)
Resetting Situation after pushing start button
![I2C + TIMER0_OVF_vect can create continuous resets (R977 @ WIN10) With_p10](https://i.servimg.com/u/f57/20/25/17/30/with_p10.jpg)
The problem appears in R927 and younger until the R977.
The version R872 and older don't show the problem.
There is also another minor bug: When triggering the righthand logic analyzer on Ch4 (SDA), once triggered (=pushing start) the ok-signal (yellow one) disappears.
![I2C + TIMER0_OVF_vect can create continuous resets (R977 @ WIN10) Missin10](https://i.servimg.com/u/f57/20/25/17/30/missin10.jpg)
I have two outputs included: ok signal in main-loop (PORTB0) and (re)start signal ahead of the main loop (PORTB1).
The (re)start signal should there be only once, but appears continuously after receiving a signal
OK Situation
![I2C + TIMER0_OVF_vect can create continuous resets (R977 @ WIN10) Withou10](https://i.servimg.com/u/f57/20/25/17/30/withou10.jpg)
Resetting Situation after pushing start button
![I2C + TIMER0_OVF_vect can create continuous resets (R977 @ WIN10) With_p10](https://i.servimg.com/u/f57/20/25/17/30/with_p10.jpg)
The problem appears in R927 and younger until the R977.
The version R872 and older don't show the problem.
There is also another minor bug: When triggering the righthand logic analyzer on Ch4 (SDA), once triggered (=pushing start) the ok-signal (yellow one) disappears.
![I2C + TIMER0_OVF_vect can create continuous resets (R977 @ WIN10) Missin10](https://i.servimg.com/u/f57/20/25/17/30/missin10.jpg)
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I2C_timer.zip
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