Is mcs51's machine cycle time correct?

It seems that mcs51's machine cycle time is 0.5us.



But the 8051 user guide says it should be 1us.



So I wonder if the clock is not correcly handled?

Is here right? Should it be 12?

So I wonder if the clock is not correcly handled?

Most probably yes.

Is here right? Should it be 12?

Yes, there is, but I need to have a look.
8051 does 2 read cycles per machine cycle, so it needs to be called every 6 clock cycles.

So is the i51timer implementation not correct? It should increment every 2 read cycle instead of 1? (If "clock cycle" displayed is "read cycle", not "machine cycle" )

arcachofo wrote:

So I wonder if the clock is not correcly handled?

Most probably yes.

Is here right? Should it be 12?

Yes, there is, but I need to have a look.
8051 does 2 read cycles per machine cycle, so it needs to be called every 6 clock cycles.

I think here should divide "psCycle()*2" instead of "psCycle()",
because psCycle() is read cycle time, which is 1/2 machine cyle time.

The problem is not only about Timer.
There are other issues to solve.

arcachofo wrote:The problem is not only about Timer.
There are other issues to solve.

I'm trying to use 8051 timer/counter to delay. And it's a bit too fast.

It shoulde count about 65535 machine cycles = 65535 us.

But time displayed is 32787.5, half of it should be.

I'm trying to use 8051 timer/counter to delay. And it's a bit too fast.
It shoulde count about 65535 machine cycles = 65535 us.
But time displayed is 32787.5, half of it should be.

Yes but the underlying problem is not exclusive for Timers.
We need a solution that fix the discrepancy between read cycles and instruction cycles.

I think it should be solved at Rev 1836.