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Logic Analizer.

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1Logic Analizer. Empty Logic Analizer. Fri May 14, 2021 5:13 am

arcachofo

arcachofo

A basic version of Logic Analizer was implemented recently.

Now what I think is a very useful feature was implemented.
It is a "pause on condition" similar to one implemented in that 2 channel Oscope (now missing) but much more powerful.

It works like a "one shot" trigger, but in adition it stops the simulation.
Conditions are expressions like this:
Ch1R for channel 1 Rising.
Ch2L for channel 2 Low.

You can use: L, R, H, F for Low, Rising, High, Falling.

You can use logic expressions like:
( ( (Ch1R & Ch2H) | (Ch4L & Ch3H & Ch2F) ) & Ch6H ) | Ch8R

Expressions are case insensitive, Ch1R, cH1r or CH1r are valid.


Another feature added is moving in time with mouse grab and move right/left.

In adition you can get a glimse of other features implemented:
- Input/output pin graphical indicator and coloring (If Circuit animation is enabled).
- That Atmega you see in the video is run by our new MCU simulator (not simavr).
- That SSD1306 is using the new TWI, which is is also used by That Atmega and will be use for any component requiring I2C communication.


As always, watching it is much better that reading stuff:

Mistral and boby like this post

2Logic Analizer. Empty Re: Logic Analizer. Wed Mar 08, 2023 12:49 am

arcachofo

arcachofo

Finished the basic implementation of one feature that I had in mind for long time: Bus channels.
You can configure any channel to read bus data.
By the way... now there are also tunnels for Buses.

Here channel 5 is configured as bus:

Logic Analizer. Busc10

TimFisch, Fizik_S and KerimF like this post

3Logic Analizer. Empty Re: Logic Analizer. Wed Mar 08, 2023 11:52 am

Defran

Defran

This is ok, This also to the version trunk, I think...

4Logic Analizer. Empty Re: Logic Analizer. Wed Mar 08, 2023 6:52 pm

arcachofo

arcachofo

This also to the version trunk, I think...
Yes, only to trunk.

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