Yes right about this part of the datasheet : but check this one on p77 :
11.2 Compare Mode
In Compare mode, the 16-bit CCPR1 register value is constantly compared against the TMR1 register pair value. When a match occurs, the CCP1 module may:
• Toggle the CCP1 output. <------------- ah ! (fact is it can, i tested this morning)
• Set the CCP1 output.
• Clear the CCP1 output.
• Generate a Special Event Trigger.
• Generate a Software Interrupt.
The action on the pin is based on the value of the CCP1M<3:0> control bits of the CCP1CON register.
All Compare modes can generate an interrupt.
I guess it is preferable to take a safe path and stick to the "reserved" ?
"Note that m_ocPin control is not released for case 10."
It should be no ?
11.2.3 SOFTWARE INTERRUPT MODE
When Generate Software Interrupt mode is chosen (CCP1M<3:0> = 1010), the CCP1 module does not
assert control of the CCP1 pin (see the CCP1CON register).
Last edited by email@example.com on Fri Apr 07, 2023 3:54 pm; edited 1 time in total